From 31f0c2f937091877ba3c34a20171a0c6992534d3 Mon Sep 17 00:00:00 2001 From: william Date: Sun, 24 Sep 2023 22:02:08 -0400 Subject: [PATCH] CPU --- bin/emu | Bin 15632 -> 0 bytes src/cpu/op.c | 89 ++++++++++++++++++++++++++++++++++++++++++--------- src/cpu/op.h | 40 ++++++++++++++++++----- 3 files changed, 105 insertions(+), 24 deletions(-) delete mode 100755 bin/emu diff --git a/bin/emu b/bin/emu deleted file mode 100755 index 0157dea7024125f3fee3510e7b496b882763256f..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 15632 zcmeHOYit}>6~4QU6NlFECW@((&}P)uG_CN&kHomGOvdjqI1f?>N=2Ejch~lUy=&Iv z;zXrbGC`Oqk_(h7RRzr-;0FjK_)!58n;PW-t>g-X3V&(=l^m6a3jw7(vYd18`8MN; zU6uZ*gfv&0`R@7d`R=`Q=DlRs!dhX`Zjf| z+DP^W&6#$`0JWO(a(p#b3130Tx;n0`f$uT20%C@YtXr>4^Mt4Xm23y=D!D=IF#bjc z0HVD-p2cD+mR?^+(dnRZQ(!!vO0mKC7u#3kBNCTsLFm|I-J<9gMF(7w@qmaY$Ap(Q ziDwucYUASQwNhc-wCKXvE&f0rgUbW2`sueb-VxCyEZvO?<32+xAjbPJ>15Z6$D0Fo z^HCXZz5U=w{DIh=d&javt^4+lr5nbwxvA-f>9*E})_wM5-fq?d^Sl~q;bW@r&@mOC zQAOsUkEz%yJ1#c4=)%6+Y2mQ5zTxTjpYgu=jaNEe{K&+E{ba%SJf&UNaZF7oz2R&wIhH-aI@-G_(TyjwIW;lm zr$&BC<0Lg zq6kD0cxNN7j>CXPK$~{$iZm&}A$)X=GExNNmt6I<#DeeC`(WUwqXkD}0p&Hwx z+;(}XM5X?Dw)v6o@*%y92jzm}$AbDgHLxwKTXdxjks1j#?E{r3+s+q)DoT8_E1?Y|{Y<<7n8SG%X$Hxgf} zy-3t@iZ4kV*Et^C-{leVJw|;{AQSG~XRo@adak;2mD~@ZIxFae}!E%kwne z{KMMK^z{oOUb|A>m*u_314Si@Koo%}0#O8_2t*NxA`nF&ia->BC<0Lgq6qM}nz*7b zYN=1%XVs6T$=+3QKYx4WZ$XKbQiS^X- z1n|35=YGQd|A_dlYKLlcj5Chg3uIb`TDAT)SzF_E3i}a_zh|CLe#gJM`@#Q5^lv`IRf&H%KHG_B|DQJJgWElyWGbS(TM#B)6NIEFwxRcd0&PAN_bC-AyIcBtcE ze-~wp(<$KfxL)tkj)Og(+kI4deFKL(I|jVNy}b|g40?kdodZ1{63Lxliueub=H*t( zC4bZW_DnkIClx2IXC*bgEalvD&*OHJ$4*n`{CF?LKjz(#8SkYh^WJDOm*%Yb{=+0m zXLH`vWG2lUOlD@n^Ye;Pd6`_AIvARqEcZ+q@}5Vj_g>GT?*Adte)VK&BYZuYnWC~M zkB|GwAws`ka1=F4!p{^Yl%31_8G9r*Wlt3H6Pbd4JU|UiW$E7;*|bm{o&61dazttO z(d6W)veUw-0>3 zrbD}&`(GzF9w6@57=e9*V8^;0FN ze@65`3yy+e{YQ!a2i{f(vHkc@LwNp4((^M2^mtAI7O9O3&yiyXJ)Re`#PO7& z$8!(xEVTtoIR1R!;b#iy@f-ofWeoF&AMkO~^D_!;Jf{E~W$^I)F(nWn{XxAYIv~audANJ^ zt&kq~G2mmN9VXqQJH_|!;P|-j1FOrPrV^e%-#=N8_$$l!0c*qrg!MnBhM+!S8BgFo z2nECXOT-8Du4Np7&xsCz{RjJ(RN-efIc>}TYr_BU!v3&}HSnf7@bZhHR$btXvkRW8L{{lt7&Nl!6 diff --git a/src/cpu/op.c b/src/cpu/op.c index b10ebc6..5b948f4 100644 --- a/src/cpu/op.c +++ b/src/cpu/op.c @@ -1,26 +1,83 @@ #include "op.h" -#define IS_ALU_OP_CODE_(op, offset) \ - case op + offset: \ - op_##op(); \ +// Reference: https://www.nesdev.org/wiki/CPU_unofficial_opcodes + +#define IS_OP_CODE_MODE(op, op_code, addr_mode) \ + case op_code: \ + op_ ## op(ADDR_MODE_ ## addr_mode); \ break; +#define IS_OP_CODE(op, op_code) \ + IS_OP_CODE_MODE(op, op_code, IMPLICIT) + +#define IS_ALU_OP_CODE_(op, offset, addr_mode) \ + IS_OP_CODE_MODE(op, OP_CODE_ ## op + offset, addr_mode) + #define IS_ALU_OP_CODE(op) \ - IS_ALU_OP_CODE_(op, 0x01) \ - IS_ALU_OP_CODE_(op, 0x05) \ - IS_ALU_OP_CODE_(op, 0x09) \ - IS_ALU_OP_CODE_(op, 0x0d) \ - IS_ALU_OP_CODE_(op, 0x11) \ - IS_ALU_OP_CODE_(op, 0x15) \ - IS_ALU_OP_CODE_(op, 0x19) \ - IS_ALU_OP_CODE_(op, 0x1d) + IS_ALU_OP_CODE_(op, 0x01, INDEXED_INDIRECT) \ + IS_ALU_OP_CODE_(op, 0x05, ZERO_PAGE) \ + IS_ALU_OP_CODE_(op, 0x09, IMMEDIATE) \ + IS_ALU_OP_CODE_(op, 0x0d, ABSOLUTE) \ + IS_ALU_OP_CODE_(op, 0x11, INDIRECT_INDEXED) \ + IS_ALU_OP_CODE_(op, 0x15, ZERO_PAGE_INDEXED_X) \ + IS_ALU_OP_CODE_(op, 0x19, ABSOLUTE_INDEXED_Y) \ + IS_ALU_OP_CODE_(op, 0x1d, ABSOLUTE_INDEXED_X) + +#define IS_ALU_OP_CODE_NO_IMMEDIATE(op) \ + IS_ALU_OP_CODE_(op, 0x01, INDEXED_INDIRECT) \ + IS_ALU_OP_CODE_(op, 0x05, ZERO_PAGE) \ + IS_ALU_OP_CODE_(op, 0x0d, ABSOLUTE) \ + IS_ALU_OP_CODE_(op, 0x11, INDIRECT_INDEXED) \ + IS_ALU_OP_CODE_(op, 0x15, ZERO_PAGE_INDEXED_X) \ + IS_ALU_OP_CODE_(op, 0x19, ABSOLUTE_INDEXED_Y) \ + IS_ALU_OP_CODE_(op, 0x1d, ABSOLUTE_INDEXED_X) + +void op_ORA(addr_mode_t addr_mode) { + +} + +void op_AND(addr_mode_t addr_mode) { + +} + +void op_EOR(addr_mode_t addr_mode) { + +} + +void op_ADC(addr_mode_t addr_mode) { + +} + +void op_STA(addr_mode_t addr_mode) { + +} + +void op_LDA(addr_mode_t addr_mode) { + +} + +void op_CMP(addr_mode_t addr_mode) { + +} + +void op_SBC(addr_mode_t addr_mode) { + +} void process_op_code(int op) { switch (op) { - IS_ALU_OP_CODE(AND) + // CTRL + IS_OP_CODE(BRK, 0x00) + IS_OP_CODE_MODE(NOP, 0x04, ZERO_PAGE) + + // ALU + IS_ALU_OP_CODE(ORA) + IS_ALU_OP_CODE(AND) + IS_ALU_OP_CODE(EOR) + IS_ALU_OP_CODE(ADC) + IS_ALU_OP_CODE_NO_IMMEDIATE(STA) + IS_ALU_OP_CODE(LDA) + IS_ALU_OP_CODE(CMP) + IS_ALU_OP_CODE(SBC) } } - -void op_AND() { - -} diff --git a/src/cpu/op.h b/src/cpu/op.h index c8f08a4..538c049 100644 --- a/src/cpu/op.h +++ b/src/cpu/op.h @@ -1,10 +1,34 @@ +#ifndef CPU_OP_H +#define CPU_OP_H + +// The number associated with each op code is the matching line of the ALU op code. +// Based on the table here: https://www.nesdev.org/wiki/CPU_unofficial_opcodes enum op_code { - ORA = 0x00, - AND = 0x20, - EOR = 0x40, - ADC = 0x60, - STA = 0x80, - LDA = 0xa0, - CMP = 0xc0, - SBC = 0xe0 + OP_CODE_ORA = 0x00, + OP_CODE_AND = 0x20, + OP_CODE_EOR = 0x40, + OP_CODE_ADC = 0x60, + OP_CODE_STA = 0x80, + OP_CODE_LDA = 0xa0, + OP_CODE_CMP = 0xc0, + OP_CODE_SBC = 0xe0 }; + +typedef enum { + ADDR_MODE_ABSOLUTE, // a + ADDR_MODE_ABSOLUTE_JUMP, // (a) + ADDR_MODE_ABSOLUTE_INDEXED_X, // a,x + ADDR_MODE_ABSOLUTE_INDEXED_Y, // a,y + ADDR_MODE_ACCUMULATOR, // A + ADDR_MODE_IMMEDIATE, // #i + ADDR_MODE_IMPLICIT, // Imp + ADDR_MODE_INDEXED_INDIRECT, // (d,x) + ADDR_MODE_INDIRECT_JUMP, // + ADDR_MODE_INDIRECT_INDEXED, // (d),y + ADDR_MODE_RELATIVE, // label + ADDR_MODE_ZERO_PAGE, // d + ADDR_MODE_ZERO_PAGE_INDEXED_X, // d,x + ADDR_MODE_ZERO_PAGE_INDEXED_Y, // d,y +} addr_mode_t; + +#endif